Announcements
Prodigy launches PCIe Gen 6 Protocol Analyzer with 64 GT/s capture capability
RFFE Protocol: Introduction Mobile radio communication involves multi-radio systems composed of several parallel transceivers making a leap in complexity for the RF front-end design. RF front-end devices include power amplifiers, low-noise amplifiers, filters, switches, power management modules, antenna tuners, and sensors. The devices may be located either in a separate unit or they may be […]
ONFI INTRODUCTION The Open NAND Flash Interface (ONFI) is an industry Workgroup made up of more than 100 companies that build, design-in, or enable NAND Flash memory dedicated to simplifying NAND Flash integration into consumer electronic products, computing platforms, and any other application that requires solid state mass storage. ONFI defines standardized component-level interface specifications […]
eSPI Protocol INTRODUCTION eSPI stands for the enhanced serial peripheral interface. It was developed by Intel. eSPI is an all-in-one bus that was designed to replace the LPC bus as well as the SPI bus, SMBus, and sideband signals. For designers of computing applications, migrating from the LPC bus to the eSPI bus offered benefits […]
A Protocol Analyzer is a measurement tool or device used to capture and monitor data over a communication channel. It captures the data on the communication channel and converts the data bits into meaningful protocol sequences. A protocol analyzer uses a combination of software and hardware to analyze and capture the data over the communication […]
Introduction to PCIe Express: This blog describes the fundamentals of the Peripheral Component Interconnect Express (PCI Express) protocol. In personal computers, peripheral devices connect to the processor subsystem using Peripheral Component Interconnect (PCI), Peripheral Component Interconnect eXtended (PCI-X), Accelerated Graphics Port (AGP), and PCIe buses. Peripherals can be graphic cards, hard disk drives, SSDs, WiFi, […]
UFS stands for Universal Flash Storage. UFS is an advanced, high speed, low power, high-performance non-volatile interface designed for mobile systems such as smartphones and tablets UFS is an open standard and defined by JEDEC and incorporates standards from the MIPI alliance. UFS utilizes the SCSI architecture model supporting multiple commands, including command queuing enabling […]
Introduction to MDIO: Management Data Input/Output (MDIO), or Media Independent Interface Management (MIIM) is a serial bus protocol defined for the IEEE 802.3 standard Ethernet series of Media Independent Interface (MII). MII connects media access control (MAC) devices to Ethernet physical layer (PHY) circuits. The SMI/MDIO protocol is a simple two-wire serial interface that connects […]
What is the role of the I3C Protocol in DDR5? DDR5 has significant improvement over DDR4. DDR5 offers higher bandwidth with a data rate of up to 6.4 Gbps and operates at 1.1V consuming lower power compared to DDR4. The channel architecture is also significantly different compared to DDR4. DDR5 has two independent channels, unlike […]
I3C devices are going through mass adoption at the moment. One challenge however remains for I3C devices is interoperability. The I3C devices need to work with devices of other manufacturers. Electrical validation of the physical pin level signaling plays a critical role in the Interoperability of the I3C Devices. There are many parameters to the […]
On July 28, 2022, congress passed the CHIPS and Science Act of 2022 to strengthen the domestic manufacturing of semiconductor chips in the U.S. The $280 Billion CHIPS Act shall provide $52 Billion specifically to boost U.S. semiconductor manufacturing, development, and research. The $52 Billion package is divided into – The $39 billion to companies […]