







Exerciser + Analyzer
I2C/SPI Exerciser and Protocol Analyzer
Model No: PGY-I2C/SPI-EX-PD
I2C/SPI Protocol Analyzer and Exerciser (PGY-I2C/SPI-EX-PD) the Protocol Analyzer with multiple features to capture and debug communication between the host and design under test. PGY-I2C/SPI-EX-PD is the leading instrument that enables the design and test engineers to test the respective I2C or SPI designs for their specifications by configuring the PGY-I2C/SPI-EX-PD as Master/Slave, generating I2C/SPI traffic and decoding the I2C/SPI protocol decode packets.
I2C is a two-wire interface to connect low-speed devices like microcontrollers, EEPROMs, A/D & D/A converters, I/O interfaces, and other small peripherals in embedded systems. The I2C bus is used by many ICs and is simple to implement. Any microcontroller can communicate with I2C buses. I2C buses can communicate on slow devices and can also use high-speed modes to transfer large amounts of data.
SPI is one of the widely used interfaces between micro-controller and peripheral ICs such as sensors, ADCs, DACs, shift registers, SRAM, and others. SPI is a synchronous, full-duplex master-slave-based interface. Both master and slave can transmit data at the same time. The SPI interface can be a 3-wire or 4-wire.
PGY-I2C/SPI-EX-PD is the leading instrument that enables the design and test engineers to test the respective I2C or SPI designs for their specifications by configuring PGY-I2C/SPI-EX-PD as master/slave, generating I2C/SPI traffic and decoding I2C/SPI Protocol decode packets.
- I2C
- SPI
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Free Online Technical Support
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Free Software Updates
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Global Sales Support
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Evaluation Units Available
- Key Features
- Specifications
- Supports I2C Specifications
- Supports SPI Specifications
- Ability to configure it as Master/Slave
- Generate different I2C/SPI Packets
- Variable data speeds
- Generate I2C/SPI traffic and protocol decode of the bus
- A timing diagram of the protocol decoded bus
- Listing view of protocol activity
- Ability to write exerciser script to combine multiple frame generation at different data speeds
- USB 2/3 host computer interface
- Continuous streaming of protocol activity to host system HDD/SSD
- API support for automation in Python or C#
Exerciser
Comprehensive Protocol Analysis using Multi-View
Multidomain View provides the complete view of I2C or SPI Protocol activity in a single GUI. Users can easily set up the analyzer to passively monitor or use the exerciser to generate I2C or SPI traffic using a GUI or script. Users can set different trigger conditions from the setup menu to capture Protocol activity at a specific event and decode the transition between Master and Slave. The decoded results can be viewed in the timing diagram and Protocol listing window with autocorrelation. This comprehensive view of information makes it the industry’s best, offering an easy-to-use solution to debug the I2C or SPI protocol activity. Continuous streaming protocol activity to host system HDD/SSD ensures seamless roll mode operation without the need to recapture data when DUT/s are set to different states thereby saving test times.
Timing Diagram and Protocol Listing View
The timing view provides the plot of the Clock and data signals with a bus diagram. Overlaying of Protocol bits on the digital timing waveform will help easy debugging of Protocol decoded data. Cursor and Zoom features will make it convenient to analyze Protocol in the timing diagram for any timing errors.